migrate to go-modules

Signed-off-by: Valentin Rothberg <rothberg@redhat.com>

13 files changed, 0 insertions, 454 deletions

diff --git a/vendor/golang.org/x/sys/cpu/cpu.go b/vendor/golang.org/x/sys/cpu/cpu.go
deleted file mode 100644
index 84962cf0f..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu.go
+++ /dev/null
@@ -1,87 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// Package cpu implements processor feature detection for
-// various CPU architectures.
-package cpu
-
-// CacheLinePad is used to pad structs to avoid false sharing.
-type CacheLinePad struct{ _ [cacheLineSize]byte }
-
-// X86 contains the supported CPU features of the
-// current X86/AMD64 platform. If the current platform
-// is not X86/AMD64 then all feature flags are false.
-//
-// X86 is padded to avoid false sharing. Further the HasAVX
-// and HasAVX2 are only set if the OS supports XMM and YMM
-// registers in addition to the CPUID feature bit being set.
-var X86 struct {
-	_            CacheLinePad
-	HasAES       bool // AES hardware implementation (AES NI)
-	HasADX       bool // Multi-precision add-carry instruction extensions
-	HasAVX       bool // Advanced vector extension
-	HasAVX2      bool // Advanced vector extension 2
-	HasBMI1      bool // Bit manipulation instruction set 1
-	HasBMI2      bool // Bit manipulation instruction set 2
-	HasERMS      bool // Enhanced REP for MOVSB and STOSB
-	HasFMA       bool // Fused-multiply-add instructions
-	HasOSXSAVE   bool // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
-	HasPCLMULQDQ bool // PCLMULQDQ instruction - most often used for AES-GCM
-	HasPOPCNT    bool // Hamming weight instruction POPCNT.
-	HasSSE2      bool // Streaming SIMD extension 2 (always available on amd64)
-	HasSSE3      bool // Streaming SIMD extension 3
-	HasSSSE3     bool // Supplemental streaming SIMD extension 3
-	HasSSE41     bool // Streaming SIMD extension 4 and 4.1
-	HasSSE42     bool // Streaming SIMD extension 4 and 4.2
-	_            CacheLinePad
-}
-
-// ARM64 contains the supported CPU features of the
-// current ARMv8(aarch64) platform. If the current platform
-// is not arm64 then all feature flags are false.
-var ARM64 struct {
-	_           CacheLinePad
-	HasFP       bool // Floating-point instruction set (always available)
-	HasASIMD    bool // Advanced SIMD (always available)
-	HasEVTSTRM  bool // Event stream support
-	HasAES      bool // AES hardware implementation
-	HasPMULL    bool // Polynomial multiplication instruction set
-	HasSHA1     bool // SHA1 hardware implementation
-	HasSHA2     bool // SHA2 hardware implementation
-	HasCRC32    bool // CRC32 hardware implementation
-	HasATOMICS  bool // Atomic memory operation instruction set
-	HasFPHP     bool // Half precision floating-point instruction set
-	HasASIMDHP  bool // Advanced SIMD half precision instruction set
-	HasCPUID    bool // CPUID identification scheme registers
-	HasASIMDRDM bool // Rounding double multiply add/subtract instruction set
-	HasJSCVT    bool // Javascript conversion from floating-point to integer
-	HasFCMA     bool // Floating-point multiplication and addition of complex numbers
-	HasLRCPC    bool // Release Consistent processor consistent support
-	HasDCPOP    bool // Persistent memory support
-	HasSHA3     bool // SHA3 hardware implementation
-	HasSM3      bool // SM3 hardware implementation
-	HasSM4      bool // SM4 hardware implementation
-	HasASIMDDP  bool // Advanced SIMD double precision instruction set
-	HasSHA512   bool // SHA512 hardware implementation
-	HasSVE      bool // Scalable Vector Extensions
-	HasASIMDFHM bool // Advanced SIMD multiplication FP16 to FP32
-	_           CacheLinePad
-}
-
-// PPC64 contains the supported CPU features of the current ppc64/ppc64le platforms.
-// If the current platform is not ppc64/ppc64le then all feature flags are false.
-//
-// For ppc64/ppc64le, it is safe to check only for ISA level starting on ISA v3.00,
-// since there are no optional categories. There are some exceptions that also
-// require kernel support to work (DARN, SCV), so there are feature bits for
-// those as well. The minimum processor requirement is POWER8 (ISA 2.07).
-// The struct is padded to avoid false sharing.
-var PPC64 struct {
-	_        CacheLinePad
-	HasDARN  bool // Hardware random number generator (requires kernel enablement)
-	HasSCV   bool // Syscall vectored (requires kernel enablement)
-	IsPOWER8 bool // ISA v2.07 (POWER8)
-	IsPOWER9 bool // ISA v3.00 (POWER9)
-	_        CacheLinePad
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_arm.go b/vendor/golang.org/x/sys/cpu/cpu_arm.go
deleted file mode 100644
index 7f2348b7d..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_arm.go
+++ /dev/null
@@ -1,9 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package cpu
-
-const cacheLineSize = 32
-
-func doinit() {}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_arm64.go b/vendor/golang.org/x/sys/cpu/cpu_arm64.go
deleted file mode 100644
index 02ed58b30..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_arm64.go
+++ /dev/null
@@ -1,67 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package cpu
-
-const cacheLineSize = 64
-
-// HWCAP/HWCAP2 bits. These are exposed by Linux.
-const (
-	hwcap_FP       = 1 << 0
-	hwcap_ASIMD    = 1 << 1
-	hwcap_EVTSTRM  = 1 << 2
-	hwcap_AES      = 1 << 3
-	hwcap_PMULL    = 1 << 4
-	hwcap_SHA1     = 1 << 5
-	hwcap_SHA2     = 1 << 6
-	hwcap_CRC32    = 1 << 7
-	hwcap_ATOMICS  = 1 << 8
-	hwcap_FPHP     = 1 << 9
-	hwcap_ASIMDHP  = 1 << 10
-	hwcap_CPUID    = 1 << 11
-	hwcap_ASIMDRDM = 1 << 12
-	hwcap_JSCVT    = 1 << 13
-	hwcap_FCMA     = 1 << 14
-	hwcap_LRCPC    = 1 << 15
-	hwcap_DCPOP    = 1 << 16
-	hwcap_SHA3     = 1 << 17
-	hwcap_SM3      = 1 << 18
-	hwcap_SM4      = 1 << 19
-	hwcap_ASIMDDP  = 1 << 20
-	hwcap_SHA512   = 1 << 21
-	hwcap_SVE      = 1 << 22
-	hwcap_ASIMDFHM = 1 << 23
-)
-
-func doinit() {
-	// HWCAP feature bits
-	ARM64.HasFP = isSet(HWCap, hwcap_FP)
-	ARM64.HasASIMD = isSet(HWCap, hwcap_ASIMD)
-	ARM64.HasEVTSTRM = isSet(HWCap, hwcap_EVTSTRM)
-	ARM64.HasAES = isSet(HWCap, hwcap_AES)
-	ARM64.HasPMULL = isSet(HWCap, hwcap_PMULL)
-	ARM64.HasSHA1 = isSet(HWCap, hwcap_SHA1)
-	ARM64.HasSHA2 = isSet(HWCap, hwcap_SHA2)
-	ARM64.HasCRC32 = isSet(HWCap, hwcap_CRC32)
-	ARM64.HasATOMICS = isSet(HWCap, hwcap_ATOMICS)
-	ARM64.HasFPHP = isSet(HWCap, hwcap_FPHP)
-	ARM64.HasASIMDHP = isSet(HWCap, hwcap_ASIMDHP)
-	ARM64.HasCPUID = isSet(HWCap, hwcap_CPUID)
-	ARM64.HasASIMDRDM = isSet(HWCap, hwcap_ASIMDRDM)
-	ARM64.HasJSCVT = isSet(HWCap, hwcap_JSCVT)
-	ARM64.HasFCMA = isSet(HWCap, hwcap_FCMA)
-	ARM64.HasLRCPC = isSet(HWCap, hwcap_LRCPC)
-	ARM64.HasDCPOP = isSet(HWCap, hwcap_DCPOP)
-	ARM64.HasSHA3 = isSet(HWCap, hwcap_SHA3)
-	ARM64.HasSM3 = isSet(HWCap, hwcap_SM3)
-	ARM64.HasSM4 = isSet(HWCap, hwcap_SM4)
-	ARM64.HasASIMDDP = isSet(HWCap, hwcap_ASIMDDP)
-	ARM64.HasSHA512 = isSet(HWCap, hwcap_SHA512)
-	ARM64.HasSVE = isSet(HWCap, hwcap_SVE)
-	ARM64.HasASIMDFHM = isSet(HWCap, hwcap_ASIMDFHM)
-}
-
-func isSet(hwc uint, value uint) bool {
-	return hwc&value != 0
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_gc_x86.go b/vendor/golang.org/x/sys/cpu/cpu_gc_x86.go
deleted file mode 100644
index f7cb46971..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_gc_x86.go
+++ /dev/null
@@ -1,16 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build 386 amd64 amd64p32
-// +build !gccgo
-
-package cpu
-
-// cpuid is implemented in cpu_x86.s for gc compiler
-// and in cpu_gccgo.c for gccgo.
-func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
-
-// xgetbv with ecx = 0 is implemented in cpu_x86.s for gc compiler
-// and in cpu_gccgo.c for gccgo.
-func xgetbv() (eax, edx uint32)
diff --git a/vendor/golang.org/x/sys/cpu/cpu_gccgo.c b/vendor/golang.org/x/sys/cpu/cpu_gccgo.c
deleted file mode 100644
index e363c7d13..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_gccgo.c
+++ /dev/null
@@ -1,43 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build 386 amd64 amd64p32
-// +build gccgo
-
-#include <cpuid.h>
-#include <stdint.h>
-
-// Need to wrap __get_cpuid_count because it's declared as static.
-int
-gccgoGetCpuidCount(uint32_t leaf, uint32_t subleaf,
-                   uint32_t *eax, uint32_t *ebx,
-                   uint32_t *ecx, uint32_t *edx)
-{
-	return __get_cpuid_count(leaf, subleaf, eax, ebx, ecx, edx);
-}
-
-// xgetbv reads the contents of an XCR (Extended Control Register)
-// specified in the ECX register into registers EDX:EAX.
-// Currently, the only supported value for XCR is 0.
-//
-// TODO: Replace with a better alternative:
-//
-//     #include <xsaveintrin.h>
-//
-//     #pragma GCC target("xsave")
-//
-//     void gccgoXgetbv(uint32_t *eax, uint32_t *edx) {
-//       unsigned long long x = _xgetbv(0);
-//       *eax = x & 0xffffffff;
-//       *edx = (x >> 32) & 0xffffffff;
-//     }
-//
-// Note that _xgetbv is defined starting with GCC 8.
-void
-gccgoXgetbv(uint32_t *eax, uint32_t *edx)
-{
-	__asm("  xorl %%ecx, %%ecx\n"
-	      "  xgetbv"
-	    : "=a"(*eax), "=d"(*edx));
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_gccgo.go b/vendor/golang.org/x/sys/cpu/cpu_gccgo.go
deleted file mode 100644
index ba49b91bd..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_gccgo.go
+++ /dev/null
@@ -1,26 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build 386 amd64 amd64p32
-// +build gccgo
-
-package cpu
-
-//extern gccgoGetCpuidCount
-func gccgoGetCpuidCount(eaxArg, ecxArg uint32, eax, ebx, ecx, edx *uint32)
-
-func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32) {
-	var a, b, c, d uint32
-	gccgoGetCpuidCount(eaxArg, ecxArg, &a, &b, &c, &d)
-	return a, b, c, d
-}
-
-//extern gccgoXgetbv
-func gccgoXgetbv(eax, edx *uint32)
-
-func xgetbv() (eax, edx uint32) {
-	var a, d uint32
-	gccgoXgetbv(&a, &d)
-	return a, d
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_linux.go b/vendor/golang.org/x/sys/cpu/cpu_linux.go
deleted file mode 100644
index a8452e094..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_linux.go
+++ /dev/null
@@ -1,61 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-//+build !amd64,!amd64p32,!386
-
-package cpu
-
-import (
-	"encoding/binary"
-	"io/ioutil"
-	"runtime"
-)
-
-const (
-	_AT_HWCAP  = 16
-	_AT_HWCAP2 = 26
-
-	procAuxv = "/proc/self/auxv"
-
-	uintSize uint = 32 << (^uint(0) >> 63)
-)
-
-// For those platforms don't have a 'cpuid' equivalent we use HWCAP/HWCAP2
-// These are initialized in cpu_$GOARCH.go
-// and should not be changed after they are initialized.
-var HWCap uint
-var HWCap2 uint
-
-func init() {
-	buf, err := ioutil.ReadFile(procAuxv)
-	if err != nil {
-		panic("read proc auxv failed: " + err.Error())
-	}
-
-	pb := int(uintSize / 8)
-
-	for i := 0; i < len(buf)-pb*2; i += pb * 2 {
-		var tag, val uint
-		switch uintSize {
-		case 32:
-			tag = uint(binary.LittleEndian.Uint32(buf[i:]))
-			val = uint(binary.LittleEndian.Uint32(buf[i+pb:]))
-		case 64:
-			if runtime.GOARCH == "ppc64" {
-				tag = uint(binary.BigEndian.Uint64(buf[i:]))
-				val = uint(binary.BigEndian.Uint64(buf[i+pb:]))
-			} else {
-				tag = uint(binary.LittleEndian.Uint64(buf[i:]))
-				val = uint(binary.LittleEndian.Uint64(buf[i+pb:]))
-			}
-		}
-		switch tag {
-		case _AT_HWCAP:
-			HWCap = val
-		case _AT_HWCAP2:
-			HWCap2 = val
-		}
-	}
-	doinit()
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_mips64x.go b/vendor/golang.org/x/sys/cpu/cpu_mips64x.go
deleted file mode 100644
index f55e0c82c..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_mips64x.go
+++ /dev/null
@@ -1,11 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build mips64 mips64le
-
-package cpu
-
-const cacheLineSize = 32
-
-func doinit() {}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_mipsx.go b/vendor/golang.org/x/sys/cpu/cpu_mipsx.go
deleted file mode 100644
index cda87b1a1..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_mipsx.go
+++ /dev/null
@@ -1,11 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build mips mipsle
-
-package cpu
-
-const cacheLineSize = 32
-
-func doinit() {}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_ppc64x.go b/vendor/golang.org/x/sys/cpu/cpu_ppc64x.go
deleted file mode 100644
index ed975de62..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_ppc64x.go
+++ /dev/null
@@ -1,32 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build ppc64 ppc64le
-
-package cpu
-
-const cacheLineSize = 128
-
-// HWCAP/HWCAP2 bits. These are exposed by the kernel.
-const (
-	// ISA Level
-	_PPC_FEATURE2_ARCH_2_07 = 0x80000000
-	_PPC_FEATURE2_ARCH_3_00 = 0x00800000
-
-	// CPU features
-	_PPC_FEATURE2_DARN = 0x00200000
-	_PPC_FEATURE2_SCV  = 0x00100000
-)
-
-func doinit() {
-	// HWCAP2 feature bits
-	PPC64.IsPOWER8 = isSet(HWCap2, _PPC_FEATURE2_ARCH_2_07)
-	PPC64.IsPOWER9 = isSet(HWCap2, _PPC_FEATURE2_ARCH_3_00)
-	PPC64.HasDARN = isSet(HWCap2, _PPC_FEATURE2_DARN)
-	PPC64.HasSCV = isSet(HWCap2, _PPC_FEATURE2_SCV)
-}
-
-func isSet(hwc uint, value uint) bool {
-	return hwc&value != 0
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_s390x.go b/vendor/golang.org/x/sys/cpu/cpu_s390x.go
deleted file mode 100644
index ce8a2289e..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_s390x.go
+++ /dev/null
@@ -1,9 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package cpu
-
-const cacheLineSize = 256
-
-func doinit() {}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_x86.go b/vendor/golang.org/x/sys/cpu/cpu_x86.go
deleted file mode 100644
index 71e288b06..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_x86.go
+++ /dev/null
@@ -1,55 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build 386 amd64 amd64p32
-
-package cpu
-
-const cacheLineSize = 64
-
-func init() {
-	maxID, _, _, _ := cpuid(0, 0)
-
-	if maxID < 1 {
-		return
-	}
-
-	_, _, ecx1, edx1 := cpuid(1, 0)
-	X86.HasSSE2 = isSet(26, edx1)
-
-	X86.HasSSE3 = isSet(0, ecx1)
-	X86.HasPCLMULQDQ = isSet(1, ecx1)
-	X86.HasSSSE3 = isSet(9, ecx1)
-	X86.HasFMA = isSet(12, ecx1)
-	X86.HasSSE41 = isSet(19, ecx1)
-	X86.HasSSE42 = isSet(20, ecx1)
-	X86.HasPOPCNT = isSet(23, ecx1)
-	X86.HasAES = isSet(25, ecx1)
-	X86.HasOSXSAVE = isSet(27, ecx1)
-
-	osSupportsAVX := false
-	// For XGETBV, OSXSAVE bit is required and sufficient.
-	if X86.HasOSXSAVE {
-		eax, _ := xgetbv()
-		// Check if XMM and YMM registers have OS support.
-		osSupportsAVX = isSet(1, eax) && isSet(2, eax)
-	}
-
-	X86.HasAVX = isSet(28, ecx1) && osSupportsAVX
-
-	if maxID < 7 {
-		return
-	}
-
-	_, ebx7, _, _ := cpuid(7, 0)
-	X86.HasBMI1 = isSet(3, ebx7)
-	X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX
-	X86.HasBMI2 = isSet(8, ebx7)
-	X86.HasERMS = isSet(9, ebx7)
-	X86.HasADX = isSet(19, ebx7)
-}
-
-func isSet(bitpos uint, value uint32) bool {
-	return value&(1<<bitpos) != 0
-}
diff --git a/vendor/golang.org/x/sys/cpu/cpu_x86.s b/vendor/golang.org/x/sys/cpu/cpu_x86.s
deleted file mode 100644
index 47f084128..000000000
--- a/vendor/golang.org/x/sys/cpu/cpu_x86.s
+++ /dev/null
@@ -1,27 +0,0 @@
-// Copyright 2018 The Go Authors. All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// +build 386 amd64 amd64p32
-// +build !gccgo
-
-#include "textflag.h"
-
-// func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
-TEXT ·cpuid(SB), NOSPLIT, $0-24
-	MOVL eaxArg+0(FP), AX
-	MOVL ecxArg+4(FP), CX
-	CPUID
-	MOVL AX, eax+8(FP)
-	MOVL BX, ebx+12(FP)
-	MOVL CX, ecx+16(FP)
-	MOVL DX, edx+20(FP)
-	RET
-
-// func xgetbv() (eax, edx uint32)
-TEXT ·xgetbv(SB),NOSPLIT,$0-8
-	MOVL $0, CX
-	XGETBV
-	MOVL AX, eax+0(FP)
-	MOVL DX, edx+4(FP)
-	RET